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Thermal stability of on-chip copper interconnect structures
Copper metallization for on-chip multilevel interconnects is receiving increasing attention for future generations of integrated circuits (ICs), with advantages of low line resistance, low interconnect delay, high electromigration resistance and, possibly, overall back-end process simplicity. Howeve...
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Published in: | Thin solid films 1995-06, Vol.262 (1), p.177-186 |
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Main Authors: | , , , , |
Format: | Article |
Language: | English |
Subjects: | |
Citations: | Items that this one cites Items that cite this one |
Online Access: | Get full text |
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Summary: | Copper metallization for on-chip multilevel interconnects is receiving increasing attention for future generations of integrated circuits (ICs), with advantages of low line resistance, low interconnect delay, high electromigration resistance and, possibly, overall back-end process simplicity. However, copper introduces a set of processing and manufacturing issues which must be addressed in the research and development phases of the technology, including thermal stability of interconnect structure. This paper summarizes the most likely processing steps for integrating copper metallization into IC technology and presents the current status of thermal-stability investigations that impact manufacturing issues (materials, unit processing and processintegration issues). |
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ISSN: | 0040-6090 1879-2731 |
DOI: | 10.1016/0040-6090(95)05841-9 |