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A design language for analog circuits
Even though analog circuit and simulation technology came first, the computer-aided design and simulation of digital circuitry is more mature. This flourishing state of affairs can be traced in part to two digital hardware description languages, VHDL and Verilog, which have fostered interchangeable...
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Published in: | IEEE spectrum 1996-10, Vol.33 (10), p.43-48 |
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Main Author: | |
Format: | Magazinearticle |
Language: | English |
Subjects: | |
Citations: | Items that this one cites Items that cite this one |
Online Access: | Get full text |
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Summary: | Even though analog circuit and simulation technology came first, the computer-aided design and simulation of digital circuitry is more mature. This flourishing state of affairs can be traced in part to two digital hardware description languages, VHDL and Verilog, which have fostered interchangeable designs and interoperable design and analysis tools. The same route is worth following in the analog realm. Analog circuits are increasing in number and complexity, especially in communications products and the importance of analyzing analog side-effects in high-speed digital circuits is growing rapidly. Both developments call for more highly integrated analog computer-aided design tools and hence for an analog hardware description language. Here, the author describes how interchangeable models, reliable simulation, and vendor convergence are on the horizon for analog and mixed-signal IC designers. |
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ISSN: | 0018-9235 1939-9340 |
DOI: | 10.1109/6.540089 |