From real-time emulation to ASIC integration for image processing applications

A methodology for automatically deriving image processing ASICs from their real-time emulation on the data-flow functional computer is presented. The aim of the method is to reduce the time and effort required to synthesize and validate ASICs after emulation. This is achieved by optimizing the archi...

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Bibliographic Details
Published in:IEEE transactions on very large scale integration (VLSI) systems 1996-09, Vol.4 (3), p.391-404
Main Authors: Kraljic, I.C., Quenot, G.M., Zavidovique, B.
Format: Article
Language:English
Subjects:
Application software
Application specific integrated circuits
Computer architecture
Detectors
Digital signal processing
Emulation
Frequency
Image processing
Prototypes
Very large scale integration
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Description
Summary:A methodology for automatically deriving image processing ASICs from their real-time emulation on the data-flow functional computer is presented. The aim of the method is to reduce the time and effort required to synthesize and validate ASICs after emulation. This is achieved by optimizing the architecture validated on the emulator and integrating the optimized resources. The paper presents the derivation of a 1100 MIPS defect detector.
ISSN:1063-8210
1557-9999
DOI:10.1109/92.532039