RICA: Reduced Interprocessor-Communication Architecture -concept and mechanisms

One of the most significant issues in building general purpose massively parallel computers is the integration of computation and communication in an efficient and cost-effective manner. This paper presents a way of integrating computation and communication from the viewpoint of the processor archit...

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Bibliographic Details
Main Authors: Sakai, S., Matsuoka, H., Kodama, Y., Sato, M., Shaw, A., Hirono, H., Okamoto, K., Yokota, T.
Format: Conference Proceeding
Language:English
Subjects:
Buildings
Clocks
Computer architecture
Concurrent computing
Data handling
Hardware
Laboratories
Network interfaces
Pipelines
Yarn
Online Access:Request full text
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Summary:One of the most significant issues in building general purpose massively parallel computers is the integration of computation and communication in an efficient and cost-effective manner. This paper presents a way of integrating computation and communication from the viewpoint of the processor architecture. It firstly states the concept of RICA, Reduced Interprocessor - Communication Architecture, which means the simplified and fused structure of communication and computation. Hardwired simple direct invocation of threads, and fusion of execution pipelines and message handling pipelines are the mechanisms for RICA.< >
DOI:10.1109/SPDP.1993.395542