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An instrumental solution to the phenomenon of negative capacitances in semiconductors
A number of authors make reference to “negative capacitances” observed during impedance measurements of metal-semiconductor and other semiconductor device structures at sufficiently low frequencies for parasitic inductances to be assumed negligible. Often, these negative capacitances are attributed...
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Published in: | Solid-state electronics 1996-03, Vol.39 (3), p.333-336 |
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Main Authors: | , , |
Format: | Article |
Language: | English |
Citations: | Items that this one cites Items that cite this one |
Online Access: | Get full text |
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Summary: | A number of authors make reference to “negative capacitances” observed during impedance measurements of metal-semiconductor and other semiconductor device structures at sufficiently low frequencies for parasitic inductances to be assumed negligible. Often, these negative capacitances are attributed to physical phenomena associated with the devices being measured. It is demonstrated in this paper that many such interpretations incorrectly neglect the importance of parasitic series inductances at low frequencies when device conductance is large, as in a forward biased Schottky barrier, or when large device leakage currents are present. Simulations of experimental data for a Schottky diode show that typical values of probe lead and other instrumental inductance may be sufficient to provide an instrumental explanation for the apparent effect. |
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ISSN: | 0038-1101 1879-2405 |
DOI: | 10.1016/0038-1101(95)00143-3 |