The Use of Field-Programmable Gate Arrays for the Hardware Acceleration of Design Automation Tasks

This paper investigates the possibility of using Field‐Programmable Gate Arrays (Fpgas) as reconfigurable co‐processors for workstations to produce moderate speedups for most tasks in the design process, resulting in a worthwhile overall design process speedup at low cost and allowing algorithm upgr...

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Bibliographic Details
Published in:VLSI Design 1996-01, Vol.1996 (2), p.135-139
Main Authors: Howard, Neil J., Tyrrell, Andrew M., Allinson, Nigel M.
Format: Article
Language:English
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Summary:This paper investigates the possibility of using Field‐Programmable Gate Arrays (Fpgas) as reconfigurable co‐processors for workstations to produce moderate speedups for most tasks in the design process, resulting in a worthwhile overall design process speedup at low cost and allowing algorithm upgrades with no hardware modification. The use of Fpgas as hardware accelerators is reviewed and then achievable speedups are predicted for logic simulation and VLSI design rule checking tasks for various Fpga co‐processor arrangements.
ISSN:1065-514X
1563-5171
DOI:10.1155/1996/17505