Reliability improvement of single-poly quasi self-aligned bicmos bjts using base surface arsenic compensation

A key issue in modern microelectronics is to improve and optimise device performance and reliability without excessively increasing fabrication costs. In this paper we will show how it is possible to improve the reliability of single-poly silicon quasi self-aligned BJTS of an advanced 0.5μm BiCMOS t...

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Bibliographic Details
Published in:Microelectronics and reliability 1996-11, Vol.36 (11-12), p.1827-1830
Main Authors: Vendrame, L., Gravier, T., Kirtsch, J., Monroy, A., Chantre, A.
Format: Article
Language:English
Subjects:
Applied sciences
Electronics
Exact sciences and technology
Testing, measurement, noise and reliability
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Summary:A key issue in modern microelectronics is to improve and optimise device performance and reliability without excessively increasing fabrication costs. In this paper we will show how it is possible to improve the reliability of single-poly silicon quasi self-aligned BJTS of an advanced 0.5μm BiCMOS technology by means of base surface As compensation without any additional mask. By carefully optimising the process parameters it is possible to maintain unchanged the characteristics of the intrinsic transistor compared to the reference one (without compensation) with only a slight increase of the parasitic base resistance, as proven by extensive statistical measurements. Depending on the As dose an increase of the device lifetime by up to four orders of magnitude can be obtained.
ISSN:0026-2714
1872-941X
DOI:10.1016/0026-2714(96)00207-7