Global design of analog cells using statistical optimization techniques

We present a methodology for automated sizing of analog cells using statistical optimization in a simulation based approach. This methodology enables us to design complex analog cells from scratch within reasonable CPU time. Three different specification types are covered: strong constraints on the...

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Bibliographic Details
Published in:Analog integrated circuits and signal processing 1994-11, Vol.6 (3), p.179-195
Main Authors: Medeiro, F., Rodr guez-Mac as, R., Fern ndez, F. V., Dom nguez-Castro, R., Huertas, J. L., Rodr guez-V zquez, A.
Format: Article
Language:English
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Summary:We present a methodology for automated sizing of analog cells using statistical optimization in a simulation based approach. This methodology enables us to design complex analog cells from scratch within reasonable CPU time. Three different specification types are covered: strong constraints on the electrical performance of the cells, weak constraints on this performance, and design objectives. A mathematical cost function is proposed and a bunch of heuristics is given to increase accuracy and reduce CPU time to minimize the cost function. A technique is also presented to yield designs with reduced variability in the performance parameters, under random variations of the transistor technological parameters. Several CMOS analog cells with complexity levels up to 48 transistors are designed for illustration. Measurements from fabricated prototypes demonstrate the suitability of the proposed methodology.
ISSN:0925-1030
1573-1979
DOI:10.1007/BF01238887