Device simulations for low voltage/low power silicon CMOS device design

Device simulations are becoming an increasingly attractive alternative to traditional, experiment-based technology development. This is due to the sky-rocketing development costs, increasing process complexity and finally the increasing maturity of the device simulation tools. In this chapter, we di...

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Bibliographic Details
Published in:Microelectronic engineering 1997-12, Vol.39 (1), p.139-144
Main Authors: Jallepalli, Srinivas, Rashed, Mahbub, Zdebel, Peter
Format: Article
Language:English
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Summary:Device simulations are becoming an increasingly attractive alternative to traditional, experiment-based technology development. This is due to the sky-rocketing development costs, increasing process complexity and finally the increasing maturity of the device simulation tools. In this chapter, we discuss some of the issues involved in low power CMOS device design using full-fledged (two-dimensional) numerical device simulations. The roles played by vertical channel profile engineering, the halo/pocket implants and shallow source / drain extensions in minimizing short channel effects is discussed.
ISSN:0167-9317
1873-5568
DOI:10.1016/S0167-9317(97)00171-8