A compact test structure for characterisation of leakage currents in sub-micron CMOS technologies

This paper presents a compact test structure for the characterisation and modelling of leakage currents in sub-micron CMOS technologies, with which all leakage components can be directly extracted automatically and input/output influence is cancelled. The test structure can also be used for measurem...

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Bibliographic Details
Published in:Microelectronics and reliability 2001-12, Vol.41 (12), p.1939-1945
Main Authors: Ning, Zhenqiu, Sneyders, Yuri, Vanderbauwhede, Wim, Gillon, Renaud, Tack, Marnix, Raes, Paul
Format: Article
Language:English
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Summary:This paper presents a compact test structure for the characterisation and modelling of leakage currents in sub-micron CMOS technologies, with which all leakage components can be directly extracted automatically and input/output influence is cancelled. The test structure can also be used for measurement of intrinsic I dd q for defect detection.
ISSN:0026-2714
1872-941X
DOI:10.1016/S0026-2714(01)00100-7