Thermomechanical Finite Element Analysis of Problems in Electronic Packaging Using the Disturbed State Concept: Part 2—Verification and Application

The finite element procedure with the unified disturbed state modeling concept presented in Part I, Basaran et al. (1998), is verified here with respect to laboratory test results for Pb40/Sn60 eutectic solder alloy. This solder alloy is a commonly used interconnection material for surface mount tec...

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Bibliographic Details
Published in:Journal of electronic packaging 1998-03, Vol.120 (1), p.48-53
Main Authors: Basaran, C, Desai, C. S, Kundu, T
Format: Article
Language:English
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Summary:The finite element procedure with the unified disturbed state modeling concept presented in Part I, Basaran et al. (1998), is verified here with respect to laboratory test results for Pb40/Sn60 eutectic solder alloy. This solder alloy is a commonly used interconnection material for surface mount technology packages. It is demonstrated that the proposed procedure provides highly satisfactory correlation with the observed laboratory behavior of materials and with test results for a chip-substrate system simulated in the laboratory.
ISSN:1043-7398
1528-9044
DOI:10.1115/1.2792285