A novel programming technique for highly scalable and disturbance immune flash EEPROM

The program speed of a selected cell and the program disturbance of unselected cells sharing the common program-line in split-gate source-side injected flash memory has been investigated. It is found that the program disturbance becomes severe as the control gate length decreases. In this letter, we...

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Bibliographic Details
Published in:Solid-state electronics 2001-02, Vol.45 (2), p.297-301
Main Authors: Huang, Kuo-Ching, Fang, Yean-Kuen, Yaung, Dun-Nian, Chen, Chung-Hui, Hsu, Yung-Lung, Ting, Shyh-Fann, Lin, Yvonne, Kuo, Di-son, Wang, Chung S., Liang, Mong-Song
Format: Article
Language:English
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Summary:The program speed of a selected cell and the program disturbance of unselected cells sharing the common program-line in split-gate source-side injected flash memory has been investigated. It is found that the program disturbance becomes severe as the control gate length decreases. In this letter, we first propose a novel program technique by applying a negative bias to inhibited word-line to improve the trade-off between program speed and program disturbance. The experimental results indicate that the new program technique is a good candidate for future high-density, high-disturbance-immunity flash EEPROM memory applications.
ISSN:0038-1101
1879-2405
DOI:10.1016/S0038-1101(01)00009-0