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Efficient simulation of QoS in ATM switches using connection traffic descriptors

High speed networks using asynchronous transfer mode (ATM) will be able to carry a broad range of traffic classes and will be required to provide QoS measures, such as the cell loss and cell delay probabilities, to many of these traffic classes. The design and testing of ATM networks and the algorit...

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Bibliographic Details
Published in:Performance evaluation 1999, Vol.38 (2), p.105-132
Main Authors: A. Akyamaç, Ahmet, Freebersyser, James A., Keith Townsend, J.
Format: Article
Language:English
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Summary:High speed networks using asynchronous transfer mode (ATM) will be able to carry a broad range of traffic classes and will be required to provide QoS measures, such as the cell loss and cell delay probabilities, to many of these traffic classes. The design and testing of ATM networks and the algorithms that perform connection admission control is difficult due to the rare event nature associated with QoS measures, and the unwieldiness of matching statistical models of the broad range of traffic classes entering the network to the connection traffic descriptors used by the connection admission control algorithms. In this paper, as an alternative to using statistical traffic models, we describe the traffic entering the network by the connection traffic descriptors standardized by the ATM Forum and used by the connection admission control algorithms. We present a Monte Carlo simulation model for estimating the cell loss and cell delay probabilities using a multinomial formulation to remove the correlation associated with estimating bursty events. We develop importance sampling techniques to increase the efficiency of the simulation for ATM networks with heterogeneous input traffic classes, namely constant bit rate and variable bit rate traffic. For the experimental examples considered here, the improvement in simulation efficiency compared to conventional Monte Carlo simulation is inversely proportional to the probability estimate. The efficient simulation methods developed here are suitable for the design and testing of the switches and connection admission control algorithms planned for use in ATM networks.
ISSN:0166-5316
1872-745X
DOI:10.1016/S0166-5316(99)00040-1