An architecture of a matrix-vector multiplier dedicated to video decoding and three-dimensional computer graphics

An architecture of a matrix-vector multiplier (MVM) is devised, which is dedicated to MPEG-4 natural/synthetic video decoding. The MVM can perform the matrix-vector multiplication both in the inverse discrete cosine transform (IDCT) and in the geometrical transformation of three-dimensional computer...

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Bibliographic Details
Published in:IEEE transactions on circuits and systems for video technology 1999-03, Vol.9 (2), p.306-314
Main Authors: Fujishima, H., Takemoto, Y., Onoye, T., Shirakawa, I.
Format: Article
Language:English
Subjects:
Architecture
Computer architecture
Computer displays
Computer graphics
Decoding
Discrete cosine transforms
Energy consumption
Information systems
Inverse
Mathematical analysis
MPEG 4 Standard
Multiplication
Multipliers
Power engineering and energy
Rendering (computer graphics)
Transformations
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Summary:An architecture of a matrix-vector multiplier (MVM) is devised, which is dedicated to MPEG-4 natural/synthetic video decoding. The MVM can perform the matrix-vector multiplication both in the inverse discrete cosine transform (IDCT) and in the geometrical transformation of three-dimensional computer graphics (3-D CG); or, specifically, it can achieve the multiplication of a 4/spl times/4 matrix by a four-tuple vector necessary in the one-dimensional IDCT for eight pixels and in the geometrical transformation for a point in a 3-D space. This paper describes a new architecture of this MVM and also shows the implementation result of a functional module composed of four MVMs with the use of 440-k transistors, which can operate at 20 MHz or less.
ISSN:1051-8215
1558-2205
DOI:10.1109/76.752097