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Resolution of a current-mode algorithmic analog-to-digital converter
Errors limiting the resolution of current-mode algorithmic analog-to-digital converters are mainly related to current mirror operation. While systematic errors can be minimized by proper circuit techniques, random sources are unavoidable. In this paper a statistical analysis of the resolution of a t...
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Published in: | IEEE transactions on circuits and systems. 1, Fundamental theory and applications Fundamental theory and applications, 2002-10, Vol.49 (10), p.1480-1486 |
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Main Authors: | , , |
Format: | Article |
Language: | English |
Subjects: | |
Citations: | Items that this one cites Items that cite this one |
Online Access: | Get full text |
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Summary: | Errors limiting the resolution of current-mode algorithmic analog-to-digital converters are mainly related to current mirror operation. While systematic errors can be minimized by proper circuit techniques, random sources are unavoidable. In this paper a statistical analysis of the resolution of a typical converter is carried out taking into account process tolerances. To support the analysis, a 4-bit ADC, realized in a 0.35-/spl mu/m CMOS technology, was exhaustively simulated. Results were found to be in excellent agreement with theoretical derivations. |
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ISSN: | 1057-7122 1558-1268 |
DOI: | 10.1109/TCSI.2002.803353 |