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State assignment techniques in multiple-valued logic

Multiple-Valued Logic (MVL) functions are implemented via Boolean multiple-wire arrangements where a careful state assignment methodology is used to ensure efficient implementation regimes. A 'power of N' module is proposed for GF (2/sup 3/). The method avoids the need to factorize the pol...

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Bibliographic Details
Main Authors: Adams, K.J., Campbell, J.G., Maguire, L.P., Webb, J.A.C.
Format: Conference Proceeding
Language:English
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Summary:Multiple-Valued Logic (MVL) functions are implemented via Boolean multiple-wire arrangements where a careful state assignment methodology is used to ensure efficient implementation regimes. A 'power of N' module is proposed for GF (2/sup 3/). The method avoids the need to factorize the polynomial and circuits can be realised using a combination of NOT AND and XOR functions. In addition, a novel transform over GF (2/sup 2/) is proposed which shows promise when compared to the Reed-Muller-Fourier transform, in its capacity to produce zero coefficients. A possible implementation strategy, using Field Programmable Gate Arrays (FPGAs) is briefly discussed.
ISSN:0195-623X
2378-2226
DOI:10.1109/ISMVL.1999.779720