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Excess loop delay in continuous-time delta-sigma modulators
Continuous-time (CT) delta-sigma modulators (/spl Delta//spl Sigma/M's) suffer from a problem not seen in discrete-time (DT) designs, that of excess loop delay: nonzero delay between the quantizer clock edge and the time when a change in output bit is seen at the feedback point in the modulator...
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Published in: | IEEE transactions on circuits and systems. 2, Analog and digital signal processing Analog and digital signal processing, 1999-04, Vol.46 (4), p.376-389 |
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Main Authors: | , |
Format: | Article |
Language: | English |
Subjects: | |
Citations: | Items that this one cites Items that cite this one |
Online Access: | Get full text |
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Summary: | Continuous-time (CT) delta-sigma modulators (/spl Delta//spl Sigma/M's) suffer from a problem not seen in discrete-time (DT) designs, that of excess loop delay: nonzero delay between the quantizer clock edge and the time when a change in output bit is seen at the feedback point in the modulator. This paper analytically shows how such delay affects the equivalence between the CT modulator loop filter and its DT counterpart. The effect of this delay on modulator dynamic range is studied through simulation for the standard double-integration (low pass) CT modulator and its equivalent fourth-order f/sub s//4 band pass circuit. For the first time, the results are extended to higher order low-pass and bandpass designs, as well as multibit designs. Methods for alleviating the performance loss caused by excess loop delay are also discussed. |
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ISSN: | 1057-7130 1558-125X |
DOI: | 10.1109/82.755409 |