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Real-time FPGA prototyping of a 15GBaud SP-16QAM coherent optical receiver with optimal interpolating for clock recovery and equalization
We demonstrate a real-time coherent optical receiver based on a single field programmable gate array (FPGA) chip. To strike the balance between the performance and hardware resources, we use a clock recovery scheme using the optimal interpolation (OI). The performance and complexity of the OI-based...
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Published in: | Optics express 2022-07, Vol.30 (15), p.26774-26786 |
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Main Authors: | , , , , , , , |
Format: | Article |
Language: | English |
Citations: | Items that this one cites Items that cite this one |
Online Access: | Get full text |
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Summary: | We demonstrate a real-time coherent optical receiver based on a single field programmable gate array (FPGA) chip. To strike the balance between the performance and hardware resources, we use a clock recovery scheme using the optimal interpolation (OI). The performance and complexity of the OI-based scheme and the traditional schemes are compared and discussed via offline digital signal processing. And a real-time 15GBaud single-polarization 16QAM transmission experiment under different received optical power using the FPGA-based receiver is carried out to demonstrate the overall performance of different clock recovery and equalization schemes. The result proves that, compared to the traditional scheme with a cubic interpolator and a 7-tap equalizer, the optimal interpolator significantly lowers the utilization of LUT, CARRY8, and DSP48 by 35%, 50%, and 11%, respectively, and can work properly under a received optical power of -40dBm. |
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ISSN: | 1094-4087 1094-4087 |
DOI: | 10.1364/OE.463512 |