Million gate PLD with 622MHz I/O interface, multiple PLLs and high performance embedded CAM

A million gate Programmable Logic Device (PLD) designed for high performance system integration is discussed. The APEX 20K1000E is fabricated on a 0.18um CMOS Process. The chip supports multiple I/O standards with data bandwidth up to 622Mbps when using the integrated Low Voltage Differential Signal...

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Bibliographic Details
Main Authors: Cheung, Sammy, Chua, Kar Keng, Ang, Boon Jin, Chong, Thow Pang, Goay, Wei Lian, Koay, Wei Yee, Kuan, Sin Wo, Lim, Chooi Pei, Oon, Jiunn Shyong, See, Theam Thye, Sung, Chiakang, Tan, Kim Pin, Tan, Yu Fong, Wong, Choong Kit
Format: Conference Proceeding
Language:English
Online Access:Get full text
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Summary:A million gate Programmable Logic Device (PLD) designed for high performance system integration is discussed. The APEX 20K1000E is fabricated on a 0.18um CMOS Process. The chip supports multiple I/O standards with data bandwidth up to 622Mbps when using the integrated Low Voltage Differential Signaling (LVDS) interfaces. Multiple on-chip Phase-Locked Loops (PLL) increase performance and provide clock-frequency synthesis. The embedded Content Addressable Memory (CAM) enhances performance for fast search applications.
ISSN:0886-5930