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In process stress analysis of flip-chip assemblies during underfill cure
Low cost flip chip on board assemblies are analyzed during the underfill cure process to determine residual stress generation. In situ stress measurements are performed over the active face of the die during processing and relative in-plane stresses are measured. Experimental measurements are made u...
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Published in: | Microelectronics and reliability 2000-07, Vol.40 (7), p.1181-1190 |
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Language: | English |
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container_end_page | 1190 |
container_issue | 7 |
container_start_page | 1181 |
container_title | Microelectronics and reliability |
container_volume | 40 |
creator | Palaniappan, P Baldwin, Daniel F |
description | Low cost flip chip on board assemblies are analyzed during the underfill cure process to determine residual stress generation. In situ stress measurements are performed over the active face of the die during processing and relative in-plane stresses are measured. Experimental measurements are made using flip-chip test vehicles, based on the Sandia National Laboratories’ ATC04 assembly test chip. Four different commercial underfill materials have been evaluated and a relative comparison is presented with respect to the residual stresses produced by each underfill on the flip-chip assemblies. Significant stress variations are observed between the four underfills studied. Correlation between the glass transition temperature (
T
g) and storage modulus (
G
′) are made relative to residual stresses produced during underfill cure. Stress relaxation characteristics are also evaluated for the low cost flip-chip assemblies. |
doi_str_mv | 10.1016/S0026-2714(00)00045-7 |
format | article |
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T
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G
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T
g) and storage modulus (
G
′) are made relative to residual stresses produced during underfill cure. Stress relaxation characteristics are also evaluated for the low cost flip-chip assemblies.</description><issn>0026-2714</issn><issn>1872-941X</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2000</creationdate><recordtype>article</recordtype><recordid>eNqFkE1LxDAQhoMouK7-BCEn0UN10u-eRBZ1FxY8qOAtpMlEI9m2Zlph_73trnj1NJdn3nnnYexcwLUAkd88A8R5FBcivQS4AoA0i4oDNhNlEUdVKt4O2ewPOWYnRJ8jVIAQM7ZcNbwLrUYiTn2YhmqU35Ij3lpuvesi_eE6rohwU3uHxM0QXPPOh8ZgsM57roeAp-zIKk949jvn7PXh_mWxjNZPj6vF3TrSSVL2EVqT1LbWmS1iERd5ZZStM21AZ4USJs5zkWdVAnrsalHUUEGS5TZNjY2TtCySObvY546tvwakXm4cafReNdgOJMdMUQGUI5jtQR1aooBWdsFtVNhKAXLyJnfe5CRFAsidNzkduN3v4fjFt8MgSTtsNBoXUPfStO6fhB93NHUE</recordid><startdate>20000701</startdate><enddate>20000701</enddate><creator>Palaniappan, P</creator><creator>Baldwin, Daniel F</creator><general>Elsevier Ltd</general><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope></search><sort><creationdate>20000701</creationdate><title>In process stress analysis of flip-chip assemblies during underfill cure</title><author>Palaniappan, P ; Baldwin, Daniel F</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c338t-efd3bfbc5f7212769dafb5cd0c57a1d266165930c271fe1b090356f44df234873</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2000</creationdate><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Palaniappan, P</creatorcontrib><creatorcontrib>Baldwin, Daniel F</creatorcontrib><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>Microelectronics and reliability</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Palaniappan, P</au><au>Baldwin, Daniel F</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>In process stress analysis of flip-chip assemblies during underfill cure</atitle><jtitle>Microelectronics and reliability</jtitle><date>2000-07-01</date><risdate>2000</risdate><volume>40</volume><issue>7</issue><spage>1181</spage><epage>1190</epage><pages>1181-1190</pages><issn>0026-2714</issn><eissn>1872-941X</eissn><abstract>Low cost flip chip on board assemblies are analyzed during the underfill cure process to determine residual stress generation. In situ stress measurements are performed over the active face of the die during processing and relative in-plane stresses are measured. Experimental measurements are made using flip-chip test vehicles, based on the Sandia National Laboratories’ ATC04 assembly test chip. Four different commercial underfill materials have been evaluated and a relative comparison is presented with respect to the residual stresses produced by each underfill on the flip-chip assemblies. Significant stress variations are observed between the four underfills studied. Correlation between the glass transition temperature (
T
g) and storage modulus (
G
′) are made relative to residual stresses produced during underfill cure. Stress relaxation characteristics are also evaluated for the low cost flip-chip assemblies.</abstract><pub>Elsevier Ltd</pub><doi>10.1016/S0026-2714(00)00045-7</doi><tpages>10</tpages></addata></record> |
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title | In process stress analysis of flip-chip assemblies during underfill cure |
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