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Substrate dopant imaging for layout reconstruction of integrated-circuit layers
Procedures have been established for layout reconstruction of complete integrated circuits so that topology and function can be determined. Circuits are imaged repeatedly, after the removal of successive layers, by electron-beam and light-optical techniques. For the polysilicon layer, layout determi...
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Published in: | Microelectronic engineering 2002-07, Vol.61, p.1063-1067 |
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Main Authors: | , , , |
Format: | Article |
Language: | English |
Subjects: | |
Citations: | Items that this one cites |
Online Access: | Get full text |
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Summary: | Procedures have been established for layout reconstruction of complete integrated circuits so that topology and function can be determined. Circuits are imaged repeatedly, after the removal of successive layers, by electron-beam and light-optical techniques. For the polysilicon layer, layout determination is complicated by processing artefacts and by low discrimination between materials in backscattered-electron images. Combination of images has facilitated interpretation of polysilicon patterns, whilst active-device regions and doped wells in the substrate have been investigated with optical microscopy and staining. |
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ISSN: | 0167-9317 1873-5568 |
DOI: | 10.1016/S0167-9317(02)00583-X |