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True Nonvolatile High‐Speed DRAM Cells Using Tailored Ultrathin IGZO
Severe power consumption in the continuous scaling of Silicon‐based dynamic random access memory (DRAM) technology quests for a transistor technology with a much lower off‐state leakage current. Wide bandgap amorphous oxide semiconductors, especially indium‐gallium‐zinc‐oxide (IGZO) exhibit many ord...
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Published in: | Advanced materials (Weinheim) 2023-05, Vol.35 (20), p.e2210554-n/a |
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Main Authors: | , , , , , , , , |
Format: | Article |
Language: | English |
Subjects: | |
Citations: | Items that this one cites Items that cite this one |
Online Access: | Get full text |
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Summary: | Severe power consumption in the continuous scaling of Silicon‐based dynamic random access memory (DRAM) technology quests for a transistor technology with a much lower off‐state leakage current. Wide bandgap amorphous oxide semiconductors, especially indium‐gallium‐zinc‐oxide (IGZO) exhibit many orders of magnitude lower off‐state leakage. However, they are typically heavily n‐doped and require negative gate voltage to turn off, which prevents them from true nonvolatile operation. The efforts on doping density reduction typically result in mobility degradation and high Schottky barriers at contacts, causing severe degradation of on‐current and operation speed of the DRAM cells. Here, high‐speed true nonvolatile DRAM cells are successfully demonstrated by deep suppression of doping density in the IGZO channel using in situ oxygen ion beam treatment and ohmic contact engineering by inserting a thin In‐rich indium‐tin‐oxide (ITO) at contact regions. A record high on‐current of 40 µA µm−1 at a large positive threshold voltage of 1.78 V enables the first true nonvolatile DRAM with the fastest write speed of 10 ns and data retention up to 25 h under power interruption, five orders of magnitude higher than the previously projected values.
The nonvolatile dynamic random access memory (DRAM) using an optimized indium‐gallium‐zinc‐oxide (IGZO) transistor with record‐high threshold voltage beyond 1.78 V and on‐current >40 µA µm−1 is demonstrated for the first time. The DRAM shows a record retention time exceeding 25 h with an ultra‐fast write speed of 10 ns under power interruption, along with a 3‐bit multilevel operation with a wide margin and excellent linearity. |
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ISSN: | 0935-9648 1521-4095 |
DOI: | 10.1002/adma.202210554 |