A modem in CMOS technology for data communication on the low-voltage power line

This paper presents a CMOS 0.8 μm mixed-signal half-duplex Modem ASIC for data transmission on the low-voltage power line. It includes all the analog circuitry needed for input interfacing and modulation/demodulation (low-noise amplifier, PLL-based frequency synthesis, tunable filter banks, and deci...

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Bibliographic Details
Published in:Integration (Amsterdam) 2003-11, Vol.36 (4), p.229-236
Main Authors: Guerra, O., Domı&#x0301, nguez-Matas, C.M., Escalera, S., Garcı&#x0301, a-González, J.M., Liñán, G., del Rı&#x0301, o, R., Delgado-Restituto, M., Rodrı&#x0301, guez-Vázquez, A.
Format: Article
Language:English
Subjects:
FSK modulation
Mixed-signal CMOS design
Power line communications
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Summary:This paper presents a CMOS 0.8 μm mixed-signal half-duplex Modem ASIC for data transmission on the low-voltage power line. It includes all the analog circuitry needed for input interfacing and modulation/demodulation (low-noise amplifier, PLL-based frequency synthesis, tunable filter banks, and decision circuitry), logic circuitry for control purposes, and an output amplifier used as front-end for an off-chip line driver. The chip demodulates signals down to 283μV rms (these are worst case values among 30 randomly-selected samples used as vehicles for detailed electrical characterization; most of the samples featured 200 μV rms sensitivity; bit error rate (BER) is below 0.5×10 −5) at 10 kbps, and operates correctly in the whole industrial temperature range, from −45°C to 80°C, under 5% variations of the 5 V supply voltage. This ASIC is now in commercial production.
ISSN:0167-9260
1872-7522
DOI:10.1016/j.vlsi.2003.09.007