Novel technologies for the realisation of GaAs pHEMTs with 120 nm self-aligned and nanoimprinted T-gates

• Published in: Microelectronic engineering 2003-06, Vol.67, p.769-774
• Main Authors: Moran, D., Boyd, E., McLelland, H., Elgaid. Y. Chen, K., Macintyre, D.S., Thoms, S., Stanley, C.R., Thayne, I.G.
• Format: Article
• Language: English
• Subjects: Applied sciences; Electronics; Exact sciences and technology; GaAs pHEMT; Interfaces; Microelectronic fabrication (materials and surfaces technology); Nanoimprint; Ohmic contact; Self-aligned; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Succinic acid; Transistors
• ISSN: 0167-9317; 1873-5568
• DOI: 10.1016/S0167-9317(03)00137-0

To address the major issues of increasing device frequency performance and reducing fabrication costs of 100 nm scale gate length III–V HEMT devices, two novel technologies developed for GaAs pHEMT are reported, namely: (i) A low resistance, non-annealed Ohmic contact technology based on a thin metallisation and highly doped In 0.2GaAs/GaAs cap layer which is compatible with a self-aligned gate process. (ii) A succinic acid based gate recess etch which selectively etches the In 0.2GaAs/GaAs cap required for the non-annealed ohmic contact technology, stopping on a 5-nm Al 0.3GaAs etch stop layer. Incorporating both of these processes, self-aligned T-gate and nanoimprinted T-gate devices have been realised. Completed self-aligned T-gate GaAs pHEMT devices of 120 nm gate length exhibited an f T and f max of 135 and 180 GHz, respectively, while nanoimprint 120 nm GaAs pHEMT devices demonstrated excellent DC characteristics, including a transconductance of 450 mS/mm.