Leakage Current in Sub-Quarter Micron MOSFET: A Perspective on Stressed Delta IDDQ Testing

The effectiveness of single threshold I^sub DDQ^ measurement for defect detection is eroded owing to higher and more variable background leakage current in modern VLSIs. Delta I^sub DDQ^ is identified as one alternative for deep submicron current measurements. Often delta I^sub DDQ^ is coupled with...

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Bibliographic Details
Published in:Journal of electronic testing 2003-06, Vol.19 (3), p.341-352
Main Authors: Semenov, Oleg, Vassighi, Arman, Sachdev, Manoj
Format: Article
Language:English
Subjects:
Stress
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Summary:The effectiveness of single threshold I^sub DDQ^ measurement for defect detection is eroded owing to higher and more variable background leakage current in modern VLSIs. Delta I^sub DDQ^ is identified as one alternative for deep submicron current measurements. Often delta I^sub DDQ^ is coupled with voltage and thermal stress in order to accelerate the failure mechanisms. A major concern is the I^sub DDQ^ limit setting under normal and stressed conditions. In this article, we investigate the impact of voltage and thermal stress on the background leakage. We calculate I^sub DDQ^ limits for normal and stressed operating conditions of 0.18 μm n-MOSFETs using a device simulator. Intrinsic leakage current components of transistor are analyzed and the impact of technology scaling on effectiveness of stressed ΔI^sub DDQ^ testing is also investigated.[PUBLICATION ABSTRACT]
ISSN:0923-8174
1573-0727
DOI:10.1023/A:1023713517064