A 63-mW H.264/MPEG-4 audio/visual codec LSI with module-wise dynamic Voltage/frequency scaling

A single-chip H.264 and MPEG-4 audio-visual LSI for mobile applications including terrestrial digital broadcasting system (ISDB-T / DVB-H) with a module-wise, dynamic voltage/frequency scaling architecture is presented for the first time. This LSI can keep operating even during the voltage/frequency...

Full description

Saved in:
Bibliographic Details
Published in:IEEE journal of solid-state circuits 2006-01, Vol.41 (1), p.54-62
Main Authors: Fujiyoshi, T., Shiratake, S., Nomura, S., Nishikawa, T., Kitasho, Y., Arakida, H., Okuda, Y., Tsuboi, Y., Hamada, M., Hara, H., Fujita, T., Hatori, F., Shimazawa, T., Yahagi, K., Takeda, H., Murakata, M., Minami, F., Kawabe, N., Kitahara, T., Seta, K., Takahashi, M., Oowaki, Y., Furuyama, T.
Format: Article
Language:English
Subjects:
Application-specific integrated circuits
Applied sciences
Architecture
Circuit properties
clock control
Codecs
Communication standards
Consumption
Data communication
Design. Technologies. Operation analysis. Testing
Digital audio broadcasting
Digital multimedia broadcasting
Dynamic voltage scaling
Dynamical systems
Dynamics
Electric potential
Electric, optical and optoelectronic circuits
Electronic circuits
Electronics
Exact sciences and technology
Frequency
Integrated circuits
Integrated circuits by function (including memories and processors)
Large scale integration
MPEG 4 Standard
Multiplexing
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Signal convertors
signal processing
Slew rate
video codecs
Voltage
voltage control
Citations: Items that this one cites
Items that cite this one
Online Access:Get full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:A single-chip H.264 and MPEG-4 audio-visual LSI for mobile applications including terrestrial digital broadcasting system (ISDB-T / DVB-H) with a module-wise, dynamic voltage/frequency scaling architecture is presented for the first time. This LSI can keep operating even during the voltage/frequency transition, so there is no performance overhead. It is realized through a dynamic deskewing system and an on-chip voltage regulator with slew rate control. By the combination with traditional low power techniques such as embedded DRAM and clock gating, it consumes only 63 mW in decoding QVGA H.264 video at 15 frames/sec and MPEG-4 AAC LC audio simultaneously.
ISSN:0018-9200
1558-173X
DOI:10.1109/JSSC.2005.859337