A configurable statistical lossless compression core based on variable order Markov modeling and arithmetic coding

This paper presents a practical realization in hardware of the concepts of variable order Markov modeling using multisymbol alphabets and arithmetic coding for lossless compression of universal data. This type of statistical coding algorithm has long been regarded as being able to deliver very high...

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Bibliographic Details
Published in:IEEE transactions on computers 2005-11, Vol.54 (11), p.1345-1359
Main Authors: Nunez-Yanez, J.L., Chouliaras, V.A.
Format: Article
Language:English
Subjects:
Algorithms
Arithmetic codes
Arithmetic coding
Coding
Compressing
Computation
Core loss
Data compression
Index Terms- Markov modeling
Lossless
lossless compression
Markov processes
Mathematical models
Programmable logic arrays
SRAM chips
statistical compression
Statistics
Studies
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Summary:This paper presents a practical realization in hardware of the concepts of variable order Markov modeling using multisymbol alphabets and arithmetic coding for lossless compression of universal data. This type of statistical coding algorithm has long been regarded as being able to deliver very high compression ratios close to the information content of the source data. However, their high computational complexity has limited their practical application in embedded environments such as in mobile computing and wireless communications. In this paper, a hardware amenable algorithm named PPMH and based on these principles has been developed and its architecture and implementation detailed. This novel lossless compression core offers innovative solutions to the computational issues in both stages of modeling and coding and delivers high compression efficiency and throughput. The configurability features of the core allow efficient use of the embedded SRAM present in modern FPGA technologies where memory resources range from a few kilobits to several megabits per device family. The core has been targeted to the Altera Stratix FPGA family and performance, coding efficiency, and complexity measured for different memory configurations.
ISSN:0018-9340
1557-9956
DOI:10.1109/TC.2005.171