A 1.2 GHz CMOS dual-modulus prescaler using new dynamic D-type flip-flops

A 1.2 GHz dual-modulus prescaler IC fabricated with 0.8 /spl mu/m CMOS technology is presented in this paper. The dual-modulus prescaler includes a synchronous counter (divide-by-4/5) and an asynchronous counter (divide-by-32). A new dynamic D-flip-flop (DFF) is developed for the high-speed synchron...

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Bibliographic Details
Published in:IEEE journal of solid-state circuits 1996-05, Vol.31 (5), p.749-752
Main Authors: Chang, Byungsoo, Park, Joonbae, Kim, Wonchan
Format: Article
Language:English
Subjects:
Capacitance
Clocks
CMOS technology
Counting circuits
Energy consumption
Flip-flops
Frequency
Phase locked loops
Voltage
Voltage-controlled oscillators
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Summary:A 1.2 GHz dual-modulus prescaler IC fabricated with 0.8 /spl mu/m CMOS technology is presented in this paper. The dual-modulus prescaler includes a synchronous counter (divide-by-4/5) and an asynchronous counter (divide-by-32). A new dynamic D-flip-flop (DFF) is developed for the high-speed synchronous counter. The maximum operating frequency of 1.22 GHz with power consumption of 25.5 mW has been measured at 5 V supply voltage.
ISSN:0018-9200
1558-173X
DOI:10.1109/4.509860