Switchable Polar Nanotexture in Nanolaminates HfO2‐ZrO2 for Ultrafast Logic‐in‐Memory Operations

• Published in: Small (Weinheim an der Bergstrasse, Germany) Germany), 2023-06, Vol.19 (25), p.e2206736-n/a
• Main Authors: Kumar, Mohit, Han, Seung‐Ik, Ahn, Yeonghwan, Jeon, Yerin, Park, Jiyeong, Seo, Hyungtak
• Format: Article
• Language: English
• Subjects: Atomic layer epitaxy; Electric fields; Ferroelectric materials; Ferroelectricity; Hafnium oxide; Hypothetical particles; Logic; logic‐in‐memory; Multilevel; nanolaminates; Nanotechnology; nanotextures; Particle theory; polar nanotextures; Room temperature; Silicon; switchable; Tunnel junctions; Zirconium dioxide
• ISSN: 1613-6810; 1613-6829
• DOI: 10.1002/smll.202206736

Nontrivial topological polar textures in ferroelectric materials, including vortices, skyrmions, and others, have the potential to develop ultrafast, high‐density, reliable multilevel memory storage and conceptually innovative processing units, even beyond the limit of binary storage of 180° aligned polar materials. However, the realization of switchable polar textures at room temperature in ferroelectric materials integrated directly into silicon using a straightforward large area fabrication technique and effectively utilizing it to design multilevel programable memory and processing units has not yet been demonstrated. Here, utilizing vector piezoresponse force and conductive atomic force microscopy, microscopic evidence of the electric field switchable polar nanotexture is provided at room temperature in HfO2‐ZrO2 nanolaminates grown directly onto silicon using an atomic layer deposition technique. Additionally, a two‐terminal Au/nanolaminates/Si ferroelectric tunnel junction is designed, which shows ultrafast (≈83 ns) nonvolatile multilevel current switching with high on/off ratio (>106), long‐term durability (>4000 s), and giant tunnel electroresistance (108%). Furthermore, 14 Boolean logic operations are tested utilizing a single device as a proof‐of‐concept for reconfigurable logic‐in‐memory processing. The results offer a potential approach to “processing with polar textures” and addressing the challenges of developing high‐performance multilevel in‐memory processing technology by virtue of its fundamentally distinct mechanism of operation. Logic‐in‐memory “processing with polar textures” at room temperature in HfO2‐ZrO2 nanolaminates are demonstrated along with 14 Boolean logic operations. Utilizing local probe force microscopy, microscopic evidence of electric field switchable polar nanotexture is provided, which is used to design ultrafast (≈83 ns) nonvolatile multilevel memory with high on/off ratio (>106), long‐term durability (>4000 s), and giant tunnel electroresistance (108%).