Harmonic distortion caused by capacitors implemented with MOSFET gates

The capacitive gate structures available in digital-oriented CMOS processes are reviewed, with emphasis on their use as linear capacitors. It is shown that the voltage harmonic distortion in MOS gate capacitors biased in either accumulation or strong inversion is almost technology independent. Exper...

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Bibliographic Details
Published in:IEEE journal of solid-state circuits 1992-10, Vol.27 (10), p.1470-1475
Main Authors: Behr, A.T., Schneider, M.C., Filho, S.N., Montoro, C.G.
Format: Article
Language:English
Subjects:
Applied sciences
Capacitance
CMOS process
CMOS technology
Design. Technologies. Operation analysis. Testing
Digital systems
Electronics
Exact sciences and technology
Filters
Harmonic distortion
Integrated circuits
MOS capacitors
MOSFET circuits
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Very large scale integration
Voltage
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Description
Summary:The capacitive gate structures available in digital-oriented CMOS processes are reviewed, with emphasis on their use as linear capacitors. It is shown that the voltage harmonic distortion in MOS gate capacitors biased in either accumulation or strong inversion is almost technology independent. Experimental and analytical results indicate that the total harmonic distortion in an adequately biased (2.5 V) gate capacitor can be kept low (THD
ISSN:0018-9200
1558-173X
DOI:10.1109/4.156456