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Flip chip on board solder joint reliability analysis using 2-D and 3-D FEA models
This study investigates the effects of employing different two-dimensional (2-D) and three-dimensional (3-D) finite element analysis (FEA) models for analyzing the solder joint reliability performance of a flip chip on board assembly. The FEA models investigated were the 2-D-plane strain, 2-D-plane...
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Published in: | IEEE transactions on advanced packaging 2001-11, Vol.24 (4), p.499-506 |
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container_title | IEEE transactions on advanced packaging |
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creator | Pang, J.H.L. Chong, D.Y.R. |
description | This study investigates the effects of employing different two-dimensional (2-D) and three-dimensional (3-D) finite element analysis (FEA) models for analyzing the solder joint reliability performance of a flip chip on board assembly. The FEA models investigated were the 2-D-plane strain, 2-D-plane stress, 3-D-1/8th symmetry and 3-D-strip models. The different stress and strain responses generated by the four different FEA models were applied to various solder joint low cycle fatigue life prediction relationships. The investigation shows that the 2-D-plane strain and 2-D-plane stress models gave the highest and lowest solder joint strains, respectively. The 3-D-strip and 3-D-1/8th symmetry model results fall in between the 2-D-plane strain and 2-D-plane stress model results. The 3-D-1/8th symmetry model agrees better with the 2-D-plane strain model, while the 3-D-strip model agrees better with the 2-D-plane stress model results. The results for the fatigue life prediction analyses also show similar trends. |
doi_str_mv | 10.1109/6040.982836 |
format | article |
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The FEA models investigated were the 2-D-plane strain, 2-D-plane stress, 3-D-1/8th symmetry and 3-D-strip models. The different stress and strain responses generated by the four different FEA models were applied to various solder joint low cycle fatigue life prediction relationships. The investigation shows that the 2-D-plane strain and 2-D-plane stress models gave the highest and lowest solder joint strains, respectively. The 3-D-strip and 3-D-1/8th symmetry model results fall in between the 2-D-plane strain and 2-D-plane stress model results. The 3-D-1/8th symmetry model agrees better with the 2-D-plane strain model, while the 3-D-strip model agrees better with the 2-D-plane stress model results. The results for the fatigue life prediction analyses also show similar trends.</description><identifier>ISSN: 1521-3323</identifier><identifier>EISSN: 1557-9980</identifier><identifier>DOI: 10.1109/6040.982836</identifier><identifier>CODEN: ITAPFZ</identifier><language>eng</language><publisher>Piscataway, NY: IEEE</publisher><subject>Applied sciences ; Assembly ; Capacitive sensors ; Chips ; Electronic equipment and fabrication. Passive components, printed wiring boards, connectics ; Electronics ; Exact sciences and technology ; Fatigue ; Finite element method ; Finite element methods ; Flip chip ; Mathematical analysis ; Performance analysis ; Predictive models ; Soldering ; Solders ; Strain ; Stress ; Stresses ; Symmetry ; Testing, measurement, noise and reliability ; Two dimensional displays</subject><ispartof>IEEE transactions on advanced packaging, 2001-11, Vol.24 (4), p.499-506</ispartof><rights>2002 INIST-CNRS</rights><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2001</rights><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c432t-4a846778453e27353d0c005cdc204e784c7ccb61bbd316f4c986f4e54c8966eb3</citedby><cites>FETCH-LOGICAL-c432t-4a846778453e27353d0c005cdc204e784c7ccb61bbd316f4c986f4e54c8966eb3</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/982836$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,780,784,27924,27925,54796</link.rule.ids><backlink>$$Uhttp://pascal-francis.inist.fr/vibad/index.php?action=getRecordDetail&idt=13487693$$DView record in Pascal Francis$$Hfree_for_read</backlink></links><search><creatorcontrib>Pang, J.H.L.</creatorcontrib><creatorcontrib>Chong, D.Y.R.</creatorcontrib><title>Flip chip on board solder joint reliability analysis using 2-D and 3-D FEA models</title><title>IEEE transactions on advanced packaging</title><addtitle>TADVP</addtitle><description>This study investigates the effects of employing different two-dimensional (2-D) and three-dimensional (3-D) finite element analysis (FEA) models for analyzing the solder joint reliability performance of a flip chip on board assembly. The FEA models investigated were the 2-D-plane strain, 2-D-plane stress, 3-D-1/8th symmetry and 3-D-strip models. The different stress and strain responses generated by the four different FEA models were applied to various solder joint low cycle fatigue life prediction relationships. The investigation shows that the 2-D-plane strain and 2-D-plane stress models gave the highest and lowest solder joint strains, respectively. The 3-D-strip and 3-D-1/8th symmetry model results fall in between the 2-D-plane strain and 2-D-plane stress model results. The 3-D-1/8th symmetry model agrees better with the 2-D-plane strain model, while the 3-D-strip model agrees better with the 2-D-plane stress model results. The results for the fatigue life prediction analyses also show similar trends.</description><subject>Applied sciences</subject><subject>Assembly</subject><subject>Capacitive sensors</subject><subject>Chips</subject><subject>Electronic equipment and fabrication. Passive components, printed wiring boards, connectics</subject><subject>Electronics</subject><subject>Exact sciences and technology</subject><subject>Fatigue</subject><subject>Finite element method</subject><subject>Finite element methods</subject><subject>Flip chip</subject><subject>Mathematical analysis</subject><subject>Performance analysis</subject><subject>Predictive models</subject><subject>Soldering</subject><subject>Solders</subject><subject>Strain</subject><subject>Stress</subject><subject>Stresses</subject><subject>Symmetry</subject><subject>Testing, measurement, noise and reliability</subject><subject>Two dimensional displays</subject><issn>1521-3323</issn><issn>1557-9980</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2001</creationdate><recordtype>article</recordtype><recordid>eNqF0c1LwzAUAPAiCs7pyZunIKgH6cxX83Ecc1NhIIKeS5qmmpE1M2kP--_N6FDwoJf3wssvj0delp0jOEEIyjsGKZxIgQVhB9kIFQXPpRTwcHfGKCcEk-PsJMYVhIgKikfZy8LZDdAfKfgWVF6FGkTvahPAytu2A8E4qyrrbLcFqlVuG20EfbTtO8D5fSrVgKS8mE_B2tfGxdPsqFEumrN9Hmdvi_nr7DFfPj88zabLXFOCu5wqQRnnghbEYE4KUkMNYaFrjSE1qa651hVDVVUTxBqqpUjRFFQLyZipyDi7Gfpugv_sTezKtY3aOKda4_tYSkQZK4SgSV7_KbHEFFMB_4cCSy65-B8yTgTjOMHLX3Dl-5C-MZZpMsa4KFBCtwPSwccYTFNugl2rsC0RLHd7LXd7LYe9Jn21b6miVq4JqtU2_jwhVHAmSXIXg7PGmO_rfZMv2EemTA</recordid><startdate>20011101</startdate><enddate>20011101</enddate><creator>Pang, J.H.L.</creator><creator>Chong, D.Y.R.</creator><general>IEEE</general><general>Institute of Electrical and Electronics Engineers</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>RIA</scope><scope>RIE</scope><scope>IQODW</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope><scope>7TB</scope><scope>FR3</scope><scope>F28</scope></search><sort><creationdate>20011101</creationdate><title>Flip chip on board solder joint reliability analysis using 2-D and 3-D FEA models</title><author>Pang, J.H.L. ; Chong, D.Y.R.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c432t-4a846778453e27353d0c005cdc204e784c7ccb61bbd316f4c986f4e54c8966eb3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2001</creationdate><topic>Applied sciences</topic><topic>Assembly</topic><topic>Capacitive sensors</topic><topic>Chips</topic><topic>Electronic equipment and fabrication. Passive components, printed wiring boards, connectics</topic><topic>Electronics</topic><topic>Exact sciences and technology</topic><topic>Fatigue</topic><topic>Finite element method</topic><topic>Finite element methods</topic><topic>Flip chip</topic><topic>Mathematical analysis</topic><topic>Performance analysis</topic><topic>Predictive models</topic><topic>Soldering</topic><topic>Solders</topic><topic>Strain</topic><topic>Stress</topic><topic>Stresses</topic><topic>Symmetry</topic><topic>Testing, measurement, noise and reliability</topic><topic>Two dimensional displays</topic><toplevel>online_resources</toplevel><creatorcontrib>Pang, J.H.L.</creatorcontrib><creatorcontrib>Chong, D.Y.R.</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library Online</collection><collection>Pascal-Francis</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>Mechanical & Transportation Engineering Abstracts</collection><collection>Engineering Research Database</collection><collection>ANTE: Abstracts in New Technology & Engineering</collection><jtitle>IEEE transactions on advanced packaging</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Pang, J.H.L.</au><au>Chong, D.Y.R.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Flip chip on board solder joint reliability analysis using 2-D and 3-D FEA models</atitle><jtitle>IEEE transactions on advanced packaging</jtitle><stitle>TADVP</stitle><date>2001-11-01</date><risdate>2001</risdate><volume>24</volume><issue>4</issue><spage>499</spage><epage>506</epage><pages>499-506</pages><issn>1521-3323</issn><eissn>1557-9980</eissn><coden>ITAPFZ</coden><abstract>This study investigates the effects of employing different two-dimensional (2-D) and three-dimensional (3-D) finite element analysis (FEA) models for analyzing the solder joint reliability performance of a flip chip on board assembly. The FEA models investigated were the 2-D-plane strain, 2-D-plane stress, 3-D-1/8th symmetry and 3-D-strip models. The different stress and strain responses generated by the four different FEA models were applied to various solder joint low cycle fatigue life prediction relationships. The investigation shows that the 2-D-plane strain and 2-D-plane stress models gave the highest and lowest solder joint strains, respectively. The 3-D-strip and 3-D-1/8th symmetry model results fall in between the 2-D-plane strain and 2-D-plane stress model results. The 3-D-1/8th symmetry model agrees better with the 2-D-plane strain model, while the 3-D-strip model agrees better with the 2-D-plane stress model results. The results for the fatigue life prediction analyses also show similar trends.</abstract><cop>Piscataway, NY</cop><pub>IEEE</pub><doi>10.1109/6040.982836</doi><tpages>8</tpages></addata></record> |
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subjects | Applied sciences Assembly Capacitive sensors Chips Electronic equipment and fabrication. Passive components, printed wiring boards, connectics Electronics Exact sciences and technology Fatigue Finite element method Finite element methods Flip chip Mathematical analysis Performance analysis Predictive models Soldering Solders Strain Stress Stresses Symmetry Testing, measurement, noise and reliability Two dimensional displays |
title | Flip chip on board solder joint reliability analysis using 2-D and 3-D FEA models |
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