A low-cost, 300-MHz, RISC CPU with attached media processor

• Published in: IEEE journal of solid-state circuits 1998-11, Vol.33 (11), p.1829-1839
• Main Authors: Santhanam, S., Baum, A.J., Bertucci, D., Braganza, M., Broch, K., Broch, T., Burnette, J., Chang, E., Kwong-Tak Chui, Dobberpuhl, D., Donahue, P., Grodstein, J., Insung Kim, Murray, D., Pearce, M., Silveria, A., Souydalay, D., Spink, A., Stepanian, R., Varadharajan, A., van Kaenel, V.R., Wen, R.
• Format: Article
• Language: English
• Subjects: Application software; Circuit testing; Clocks; Current supplies; Frequency; Microprocessors; Modems; Reduced instruction set computing; Semiconductor device measurement; Videoconference
• ISSN: 0018-9200; 1558-173X
• DOI: 10.1109/4.726584

This paper describes the 300-MHz StrongARM 1500 microprocessor, which is capable of more than two billion 16-b operations per second. Starting with the original StrongARM 110 design, an attached media processor (AMP) has been integrated along with a synchronous DRAM memory controller and separate I/O bus. In addition, several enhancements have been made to the CPU and cache subsystem, and the chip has been shrunk from a 0.35-to a 0.28-/spl mu/m technology. The chip includes 3.3 million transistors and measures 60 mm/sup 2/. It dissipates less than 3 W at 300 MHz at 2.0-V internal, 3.3-V I/O. The chip supports dynamic clock frequency switching for reduced operating power during low performance demands. There are 333 separately conditioned clocks on the chip, For battery-powered applications, V/sub dd/ can be reduced to achieve