Undoped InP/InGaAs heterostructure insulated-gate FET' s grown byOMVPE with PECVD-deposited SiO(2) as gate insulator

• Published in: IEEE electron device letters 1988-10, Vol.9 (10), p.500-502
• Main Authors: Martin, E A, Aina, O A, Iliadis, A A, Mattingly, M R, Stecker, L H
• Format: Article
• Language: English
• ISSN: 0741-3106
• DOI: 10.1109/55.17824

The fabrication and performance of InP/InGaAs insulated-gate FETs which use a heterojunction to isolate the channel electrons from the semiconductor-insulator interface are discussed. Plasma-enhanced chemical vapor deposition (PECVD) was used to deposit SiO(2) on InP to form the gate insulator. Since the device structure is undoped, channel electrons are accumulated by the gate-induced field across the insulator. Extrinsic transconductances of 130 mS/mm (300 K) and 210 mS/mm (77 K) were achieved for 1.5- mum gate-length devices. Gate-drain breakdown voltages in excess of 20 V were also measured