MOS varactor modeling with a subcircuit utilizing the BSIM3v3 model

This paper presents a subcircuit model for an MOS varactor based on the BSIM3v3 model suitable for simulator implementation within circuit-design environments. The development of the model and BSIM3v3 model parameter settings are discussed in detail. By varying the length (L) of the device, C/sub MA...

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Bibliographic Details
Published in:IEEE transactions on electron devices 2002-07, Vol.49 (7), p.1206-1211
Main Authors: Molnar, K., Rappitsch, G., Huszka, Z., Seebacher, E.
Format: Article
Language:English
Subjects:
Circuit tuning
Circuits
CMOS
CMOS integrated circuits
Devices
Metal oxide semiconductors
MOS capacitors
Q factor
Quality factor
Semiconductor device modeling
SPICE
Tuning
Varactors
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Summary:This paper presents a subcircuit model for an MOS varactor based on the BSIM3v3 model suitable for simulator implementation within circuit-design environments. The development of the model and BSIM3v3 model parameter settings are discussed in detail. By varying the length (L) of the device, C/sub MAX//C/sub MIN/ ratios as high as five or minimum quality factors of 21.5 at 2.4 GHz can be achieved using a standard 0.35 /spl mu/m CMOS process. The investigation of different geometries resulted in a tradeoff between capacitance tuning and quality factor. A medium length varactor has been characterized.
ISSN:0018-9383
1557-9646
DOI:10.1109/TED.2002.1013277