Enhanced substrate current in SOI MOSFETs

This letter reports an enhanced substrate current at high gate bias in SOI MOSFETs. A comparison between coprocessed bulk and partially depleted SOI MOSFETs is used to present the enhancement unique to SOI devices and demonstrate the underlying mechanism. Other than electric field, a new source for...

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Bibliographic Details
Published in:IEEE electron device letters 2002-05, Vol.23 (5), p.282-284
Main Authors: Pin Su, Goto, K., Sugii, T., Chenming Hu
Format: Article
Language:English
Subjects:
Channels
Current carriers
Depletion
Devices
Dynamics
Heating
Hot carrier effects
Impact ionization
Mathematical models
MOSFETs
Predictive models
Resistance heating
Silicon on insulator technology
Substrates
Temperature
Thermal conductivity
Voltage
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Summary:This letter reports an enhanced substrate current at high gate bias in SOI MOSFETs. A comparison between coprocessed bulk and partially depleted SOI MOSFETs is used to present the enhancement unique to SOI devices and demonstrate the underlying mechanism. Other than electric field, a new source for carrier heating in the channel, i.e., self-lattice heating, is found to be responsible for the excess substrate current observed. The impact of this phenomenon on SOI device lifetime prediction and compact modeling under dynamic operating conditions typical of digital circuit operation is described. This SOI-specific enhancement must be considered in one-to-one comparisons between bulk and SOI MOSFETs regarding hot-carrier effects.
ISSN:0741-3106
1558-0563
DOI:10.1109/55.998877