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An experimental coin-sized radio for extremely low-power WPAN (IEEE 802.15.4) application at 2.4 GHz

An experimental 2.4-GHz CMOS radio composed of RF and digital circuits for the low-power and low-rate preliminary IEEE802.15.4 WPAN is reported, consuming 21 mW in receive mode and 30 mW in transmit mode. The RF design focus is to maximize linearity for a given power consumption using linearization...

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Bibliographic Details
Published in:IEEE journal of solid-state circuits 2003-12, Vol.38 (12), p.2258-2268
Main Authors: Choi, Pilsoon, Park, Hyung Chul, Kim, Sohyeong, Park, Sungchung, Nam, Ilku, Kim, Tae Wook, Park, Seokjong, Shin, Sangho, Kim, Myeung Su, Kang, Kyucheol, Ku, Yeonwoo, Choi, Hyokjae, Park, Sook Min, Lee, Kwyro
Format: Article
Language:English
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Summary:An experimental 2.4-GHz CMOS radio composed of RF and digital circuits for the low-power and low-rate preliminary IEEE802.15.4 WPAN is reported, consuming 21 mW in receive mode and 30 mW in transmit mode. The RF design focus is to maximize linearity for a given power consumption using linearization methods which lead an order of magnitude improvement in LNA/mixer IIP3/power performance. Chip-on-PCB technology allows implementation of a coin-sized radio at very low cost, which also provides 3 dBi gain patch antenna and high Q (>50) inductors.
ISSN:0018-9200
1558-173X
DOI:10.1109/JSSC.2003.819083