Application of a 3000-gate GaAs array in the development of a gigahertz digital test system

The characterization of a high-speed GaAs LSi gate array and its personalization as the central control chip for a gigahertz-rate digital test system are described. The array is a 1020-configurable-cell, 3000-gate device that utilizes a commercially available enhancement/depletion (E/D) mode IC proc...

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Bibliographic Details
Published in:IEEE journal of solid-state circuits 1989-08, Vol.24 (4), p.1092-1104
Main Authors: Schwab, D.J., Perkins, D.F., Reeder, T.M., Gilbert, B.K.
Format: Article
Language:English
Subjects:
Arithmetic
Centralized control
Clocks
Control systems
Digital control
Gallium arsenide
Logic arrays
Logic design
Logic devices
System testing
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Summary:The characterization of a high-speed GaAs LSi gate array and its personalization as the central control chip for a gigahertz-rate digital test system are described. The array is a 1020-configurable-cell, 3000-gate device that utilizes a commercially available enhancement/depletion (E/D) mode IC process. The development and experimental evaluation of an array personalization designed to characterize all logic macros, the array speed-power performance, and a simple MSI arithmetic element are described. The results of the evaluation of this first design were used to design a digital tester control chip for use at clock rates of up to 1 GHz. Issues in the design of a digital tester are outlined, and the architectural features of a modular tester providing synchronous data acquisition, high-speed RAM control, and pattern generation are discussed.< >
ISSN:0018-9200
1558-173X
DOI:10.1109/4.34097