Process simplification in DRAM manufacturing

• Published in: IEEE transactions on electron devices 1998-03, Vol.45 (3), p.609-619
• Main Authors: Thakur, R.P.S., DeBoer, S.J., Ping, E.-X., Jesse, C.A.
• Format: Article
• Language: English
• Subjects: Costs; Knowledge engineering; Manufacturing processes; Process control; Process design; Pulp manufacturing; Random access memory; Statistical analysis; Technological innovation; Transistors
• ISSN: 0018-9383; 1557-9646
• DOI: 10.1109/16.661222

DRAM manufacturers are driving the quest for integration friendly, simplified, and statistically-controlled process development. In the DRAM field, strong emphasis must be placed on "process simplification" as a means of staying cost effective and competitive. In order to examine process architecture and process integration, both at the module and system levels, it is emphasized that using correct statistical methods in conjunction with advanced technology is important. For simplified process development and integration, many aspects of the new process assessment are data driven. Also, it is critical to understand the source of variation in the process, obtain process stability, and assess the process capability relative to specifications of manufacturability and functionality. Statistical process control techniques are a requirement for interpreting the results of process capability studies, as will be discussed in this paper. In this paper, we have emphasized that both statistical methods and technological innovation are required for process optimization. We have investigated several examples that illustrate the methodology followed for the development of statistically controlled, production-worthy processes. The process improvement strategy is described both for gate stack and the DRAM cell. The focus of the results described here is both in the context of enhancing process capability for existing processes and evaluating alternate process options that can be accomplished through the use of advanced process technology.