Single-event upset in commercial silicon-on-insulator PowerPC microprocessors

Single-event upset effects from heavy ions and protons are measured for Motorola and IBM silicon-on-insulator (SOI) microprocessors, and compared with results for similar devices with bulk substrates. The cross sections of the SOI processors are lower than their bulk counterparts, but the threshold...

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Bibliographic Details
Published in:IEEE transactions on nuclear science 2002-12, Vol.49 (6), p.3148-3155
Main Authors: Irom, F., Farmanesh, F.F., Johnston, A.H., Swift, G.M., Millward, D.G.
Format: Article
Language:English
Subjects:
Collection
Cross sections
Devices
Laboratories
Manufacturing processes
Microprocessors
Permissible error
Processors
Propulsion
Protons
Registers
Silicon on insulator technology
Single event upset
Space applications
Substrates
Testing
Voltage
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Summary:Single-event upset effects from heavy ions and protons are measured for Motorola and IBM silicon-on-insulator (SOI) microprocessors, and compared with results for similar devices with bulk substrates. The cross sections of the SOI processors are lower than their bulk counterparts, but the threshold is about the same, even though the charge collections depth is more than an order of magnitude smaller in the SOI devices. The upset rates are low enough to allow these devices to be used in space applications where occasional register or functional operating errors can be tolerated.
ISSN:0018-9499
1558-1578
DOI:10.1109/TNS.2002.805441