Self-passivated copper gates for amorphous silicon thin-film transistors

A solution to the amorphous silicon transistor gate metallization problem in active matrix liquid crystal displays (AMLCD's) is demonstrated, in the form of a self-passivated copper (Cu) process. Cu is passivated by a self-aligned chromium (Cr) oxide encapsulation formed by surface segregation...

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Bibliographic Details
Published in:IEEE electron device letters 1997-08, Vol.18 (8), p.388-390
Main Authors: Sirringhaus, H., Theiss, S.D., Kahn, A., Wagner, S.
Format: Article
Language:English
Subjects:
Active matrix liquid crystal displays
Amorphous silicon
Chemicals
Chromium alloys
Copper alloys
Encapsulation
Metallization
Semiconductor thin films
Thermal stresses
Thin film transistors
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Summary:A solution to the amorphous silicon transistor gate metallization problem in active matrix liquid crystal displays (AMLCD's) is demonstrated, in the form of a self-passivated copper (Cu) process. Cu is passivated by a self-aligned chromium (Cr) oxide encapsulation formed by surface segregation of Cr in dilute Cu-10-30 at.%Cr alloys at 400/spl deg/C, solving the problems of chemical reactivity during the plasma deposition, diffusion, poor adhesion to the substrate, and oxidation. The performance of self-passivated Cu bottom-gate thin-film transistors (TFT's) and their stability during thermal bias stress testing is comparable to that of Cr-gate reference TFT's. The gate line resistivity (including encapsulation) is 4.5 μ/spl Omega//spl middot/cm at present.
ISSN:0741-3106
1558-0563
DOI:10.1109/55.605448