Two-Dimensional Routing for the Silc Silicon Compiler

This paper presents a new method for generating a two-dimensional routing for a class of custom integrated circuits (IC's). The method has been designed for Silc, an experimental silicon compiler currently under development at GTE Laboratories, and is suitable for the design of custom IC's...

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Bibliographic Details
Published in:IEEE transactions on computer-aided design of integrated circuits and systems 1985-07, Vol.4 (3), p.198-203
Main Author: Ciesielski, M.J.
Format: Article
Language:English
Subjects:
Analytical models
Application specific integrated circuits
Applied sciences
Design methodology
Electronics
Exact sciences and technology
Integrated circuit interconnections
Integrated circuits
Laboratories
Minimization
Routing
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Shape
Silicon compiler
Topology
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Summary:This paper presents a new method for generating a two-dimensional routing for a class of custom integrated circuits (IC's). The method has been designed for Silc, an experimental silicon compiler currently under development at GTE Laboratories, and is suitable for the design of custom IC's composed of functional blocks. The method is based on an analytical model for generating a one-dimensional distribution of interconnections in irregularly shaped routing channels. The described procedure first determines the channel shapes that minimize the size of the layout and then allocates nets inside the channels while maintaining the required routing topology. One dimension of the layout is optimized at a time. Two-dimensional routing is obtained by coupling the minimization of the vertical and the horizontal dimensions of the layout with a set of additional constraints to ensure routing feasibility. The algorithm that implements this method has polynomial time complexity. The quality of the suboptimal results obtained with this method can be evaluated by comparison with the lower bounds obtained from independent, unconstrained linear programming solutions.
ISSN:0278-0070
1937-4151
DOI:10.1109/TCAD.1985.1270115