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A table lookup FET model for accurate analog circuit simulation
A table-based approach to the empirical modeling off FETs in circuit simulators addresses the specific requirements of analog circuit design, such as accuracy in reproducing small-signal parameters, large signal nonlinearities, subthreshold characteristics, substrate effects, short-channel effects,...
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Published in: | IEEE transactions on computer-aided design of integrated circuits and systems 1993-02, Vol.12 (2), p.324-335 |
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Main Authors: | , |
Format: | Article |
Language: | English |
Subjects: | |
Citations: | Items that this one cites Items that cite this one |
Online Access: | Get full text |
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Summary: | A table-based approach to the empirical modeling off FETs in circuit simulators addresses the specific requirements of analog circuit design, such as accuracy in reproducing small-signal parameters, large signal nonlinearities, subthreshold characteristics, substrate effects, short-channel effects, and voltage dependent capacitances. Efficiencies in storage and computation brought about by this model in SPICE considerably speed up circuit simulation, compared to an analytical model offering similar accuracy. Methods are described to extract the table entries. The model is not specific to any one type of device or technology, although examples are given of how it may be simplified by using physical insights into device operation.< > |
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ISSN: | 0278-0070 1937-4151 |
DOI: | 10.1109/43.205011 |