Implementation-independent model of an instruction set architecture in VHDL

A methodology using a VHDL (VHSIC hardware description language) to create executable models of computer architectures independent of implementation attributes is described. The authors present such a model of a processor architecture known as the WM as the first step in developing an implementation...

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Bibliographic Details
Published in:IEEE design & test of computers 1993-09, Vol.10 (3), p.42-54
Main Authors: Salinas, M.H., Johnson, B.W., Aylor, J.H.
Format: Article
Language:English
Subjects:
Clocks
Computational modeling
Computer architecture
Hardware design languages
High speed integrated circuits
Integrated circuit modeling
Parallel processing
Process design
Synchronization
Very high speed integrated circuits
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Summary:A methodology using a VHDL (VHSIC hardware description language) to create executable models of computer architectures independent of implementation attributes is described. The authors present such a model of a processor architecture known as the WM as the first step in developing an implementation. Simulations using the model can provide performance measurements such as potential parallelism. The model can also serve as an architectural specification for the computer.< >
ISSN:0740-7475
1558-1918
DOI:10.1109/54.232471