Whistle: a workbench for test development of library-based designs

• Published in: Computer (Long Beach, Calif.) Calif.), 1989-04, Vol.22 (4), p.27-41
• Main Authors: Renous, R., Silberman, G.M., Spillinger, I.
• Format: Article
• Language: English
• Subjects: Circuit faults; Design for manufacture; Libraries; Logic design; Logic testing; Pattern analysis; Software testing; Software tools; Test pattern generators; Very large scale integration
• ISSN: 0018-9162; 1558-0814
• DOI: 10.1109/2.25380

The authors have applied the difference fault model (DFM) approach to the simulation of high-level designs and built a complete environment for test generation and fault simulation of designs expressed in a hardware description language (HDL), such as VHDL. Their environment, called Whistle, consists of a set of programs that supports a library-based design style. They describe the tools in Whistle, with special emphasis on the tools used to analyze each block in the design library, and the generation of code for the simulation of the F-faults in the design. The authors then evaluate Whistle from several points of view. First, they illustrate the accuracy of the fault coverage estimates by comparing them with the actual fault coverage obtained by gate-level fault simulation. Second, they examine the correlation between the accuracy measurements as given by their evaluation functions and the behavior of various characterization functions for a given block. This illustrates how critical it is to choose a good characterization function and how it affects the accuracy of the results. A third aspect of Whistle that they look at is its test-generation capability.< >