A 2-Gb/s 0.5-mum CMOS parallel optical transceiver with fast power-on capability

• Published in: Journal of lightwave technology 2004-09, Vol.22 (9), p.2135-2148
• Main Authors: Gui, Ping, Kiamilev, F E, Wang, X Q, Wang, X L, McFadden, M J, Haney, M W, Kuznia, C
• Format: Article
• Language: English
• ISSN: 0733-8724
• DOI: 10.1109/JLT.2004.833264

This paper describes an optical transceiver designed for power-efficient connections within high-speed digital systems, specifically for board- and backplane-level interconnections. A 2-Gb/s, four-channel, dc-coupled differential optical transceiver was fabricated in a 0.5-mum complementary metal-oxide-semiconductor (CMOS) silicon-on-sapphire (SoS) process and incorporates fast individual-channel power-down and power-on functions. A dynamic sleep transistor technique is used to turn off transceiver circuits and optical devices during power-down. Differential signaling (using two optical channels per signal) enables self-thresholding and allows the transceiver to quickly return from power-down to normal operation. A free-space optical link system was built to evaluate transceiver performance. Experimental results show power-down and power-on transition times to be within a few nanoseconds. Crosstalk measurements show that these transitions do not significantly impact signal integrity of adjacent active channels.