Design Analysis of GaAs Direct Coupled Field Effect Transistor Logic

Parameters of a DCFL inverter, such as propagation delay, inverter gain, switching voltage, output voltage levels and noise margins, are related (in an analytical form) to the parameters of the switching transistor and load transistor, such as the load saturation current, the switching transistor th...

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Bibliographic Details
Published in:IEEE transactions on computer-aided design of integrated circuits and systems 1986-04, Vol.5 (2), p.266-273
Main Authors: Peczalski, A., Shur, M.S., Hyun, C.H., Lee, K.W., Tho Truong Vu
Format: Article
Language:English
Subjects:
Applied sciences
Circuit noise
Circuit simulation
Electronics
Energy consumption
Exact sciences and technology
FETs
Gallium arsenide
Integrated circuits
Inverters
Logic design
Noise level
Propagation delay
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Threshold voltage
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Summary:Parameters of a DCFL inverter, such as propagation delay, inverter gain, switching voltage, output voltage levels and noise margins, are related (in an analytical form) to the parameters of the switching transistor and load transistor, such as the load saturation current, the switching transistor threshold voltage, the load and switching transistor output conductances, etc., and to the gate fan-in and fan-out. The results demonstrate tradeoffs between the noise margins, propagation delay and power consumption and are in reasonable agreement with experimental data for GaAs self-aligned inverters and with the results of circuit simulation of DCFL inverters and ring oscillators.
ISSN:0278-0070
1937-4151
DOI:10.1109/TCAD.1986.1270195