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Algorithms for scalable synchronization on shared-memory multiprocessors
Busy-wait techniques are heavily used for mutual exclusion and barrier synchronization in shared-memory parallel programs. Unfortunately, typical implementations of busy-waiting tend to produce large amounts of memory and interconnect contention, introducing performance bottlenecks that become marke...
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Published in: | ACM transactions on computer systems 1991-02, Vol.9 (1), p.21-65 |
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creator | Mellor-Crummey, John M. Scott, Michael L. |
description | Busy-wait techniques are heavily used for mutual exclusion and barrier synchronization in shared-memory parallel programs. Unfortunately, typical implementations of busy-waiting tend to produce large amounts of memory and interconnect contention, introducing performance bottlenecks that become markedly more pronounced as applications scale. We argue that this problem is not fundamental, and that one can in fact construct busy-wait synchronization algorithms that induce no memory or interconnect contention. The key to these algorithms is for every processor to spin on separate locally-accessible flag variables, and for some other processor to terminate the spin with a single remote write operation at an appropriate time. Flag variables may be locally-accessible as a result of coherent caching, or by virtue of allocation in the local portion of physically distributed shared memory. We present a new scalable algorithm for spin locks that generates 0(1) remote references per lock acquisition, independent of the number of processors attempting to acquire the lock. Our algorithm provides reasonable latency in the absence of contention, requires only a constant amount of space per lock, and requires no hardware support other than a swap-with-memory instruction. We also present a new scalable barrier algorithm that generates 0(1) remote references per processor reaching the barrier, and observe that two previously-known barriers can likewise be cast in a form that spins only on locally-accessible flag variables. None of these barrier algorithms requires hardware support beyond the usual atomicity of memory reads and writes. We compare the performance of our scalable algorithms with other software approaches to busy-wait synchronization on both a Sequent Symmetry and a BBN Butterfly. Our principal conclusion is that contention due to synchronization need not be a problem in large-scale shared-memory multiprocessors. The existence of scalable algorithms greatly weakens the case for costly special-purpose hardware support for synchronization, and provides a case against so-called “dance hall” architectures, in which shared memory locations are equally far from all processors. —From the Authors' Abstract |
doi_str_mv | 10.1145/103727.103729 |
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Our algorithm provides reasonable latency in the absence of contention, requires only a constant amount of space per lock, and requires no hardware support other than a swap-with-memory instruction. We also present a new scalable barrier algorithm that generates 0(1) remote references per processor reaching the barrier, and observe that two previously-known barriers can likewise be cast in a form that spins only on locally-accessible flag variables. None of these barrier algorithms requires hardware support beyond the usual atomicity of memory reads and writes. We compare the performance of our scalable algorithms with other software approaches to busy-wait synchronization on both a Sequent Symmetry and a BBN Butterfly. Our principal conclusion is that contention due to synchronization need not be a problem in large-scale shared-memory multiprocessors. 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Unfortunately, typical implementations of busy-waiting tend to produce large amounts of memory and interconnect contention, introducing performance bottlenecks that become markedly more pronounced as applications scale. We argue that this problem is not fundamental, and that one can in fact construct busy-wait synchronization algorithms that induce no memory or interconnect contention. The key to these algorithms is for every processor to spin on separate locally-accessible flag variables, and for some other processor to terminate the spin with a single remote write operation at an appropriate time. Flag variables may be locally-accessible as a result of coherent caching, or by virtue of allocation in the local portion of physically distributed shared memory. We present a new scalable algorithm for spin locks that generates 0(1) remote references per lock acquisition, independent of the number of processors attempting to acquire the lock. Our algorithm provides reasonable latency in the absence of contention, requires only a constant amount of space per lock, and requires no hardware support other than a swap-with-memory instruction. We also present a new scalable barrier algorithm that generates 0(1) remote references per processor reaching the barrier, and observe that two previously-known barriers can likewise be cast in a form that spins only on locally-accessible flag variables. None of these barrier algorithms requires hardware support beyond the usual atomicity of memory reads and writes. We compare the performance of our scalable algorithms with other software approaches to busy-wait synchronization on both a Sequent Symmetry and a BBN Butterfly. Our principal conclusion is that contention due to synchronization need not be a problem in large-scale shared-memory multiprocessors. The existence of scalable algorithms greatly weakens the case for costly special-purpose hardware support for synchronization, and provides a case against so-called “dance hall” architectures, in which shared memory locations are equally far from all processors. —From the Authors' Abstract</description><subject>Applied sciences</subject><subject>Architectures</subject><subject>Computer science; control theory; systems</subject><subject>Computer systems and distributed systems. User interface</subject><subject>Computer systems organization</subject><subject>Contextual software domains</subject><subject>Cross-computing tools and techniques</subject><subject>Design</subject><subject>Dynamic memory</subject><subject>Exact sciences and technology</subject><subject>General and reference</subject><subject>Hardware</subject><subject>Hierarchical storage management</subject><subject>Information storage systems</subject><subject>Information systems</subject><subject>Integrated circuits</subject><subject>Interconnection architectures</subject><subject>Measurement</subject><subject>Mutual exclusion</subject><subject>Operating systems</subject><subject>Parallel architectures</subject><subject>Process management</subject><subject>Process synchronization</subject><subject>Semiconductor memory</subject><subject>Software</subject><subject>Software and its engineering</subject><subject>Software organization and properties</subject><subject>Storage management</subject><issn>0734-2071</issn><issn>1557-7333</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>1991</creationdate><recordtype>article</recordtype><recordid>eNpNkE1Lw0AQhhdRsFaPHrzlIN5SZz_yscdS1AoFL3oOk83GriTZupMc6q83bYoIAy8Mz7wDD2O3HBacq-SRg8xEtjiGPmMzniRZnEkpz9kMMqliARm_ZFdEXwAw7sWMrZfNpw-u37YU1T5EZLDBsrER7TuzDb5zP9g730Xj0BaDreLWtj7so3ZoercL3lgiH-iaXdTYkL055Zx9PD-9r9bx5u3ldbXcxKgE9HEOFUKVVxxTQFsmqNMSEp2lpVUVlqJMbZVoo_KkliKvS5nWkgNyJS0oyFM5Zw9T7_j6e7DUF60jY5sGO-sHKkSulRKjgzmLJ9AETxRsXeyCazHsCw7FwVcx-ZpCj_z9qRgPEuqAnXH0d6S0zFN9wO4mDE37r_FY8QvNmXLy</recordid><startdate>19910201</startdate><enddate>19910201</enddate><creator>Mellor-Crummey, John M.</creator><creator>Scott, Michael L.</creator><general>ACM</general><general>Association for Computing Machinery</general><scope>IQODW</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SC</scope><scope>8FD</scope><scope>JQ2</scope><scope>L7M</scope><scope>L~C</scope><scope>L~D</scope></search><sort><creationdate>19910201</creationdate><title>Algorithms for scalable synchronization on shared-memory multiprocessors</title><author>Mellor-Crummey, John M. ; Scott, Michael L.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-a420t-80da0d8d1a60aeb5a96b05976be4dab2b6ed59c485f328fb36f310a143e040863</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>1991</creationdate><topic>Applied sciences</topic><topic>Architectures</topic><topic>Computer science; control theory; systems</topic><topic>Computer systems and distributed systems. User interface</topic><topic>Computer systems organization</topic><topic>Contextual software domains</topic><topic>Cross-computing tools and techniques</topic><topic>Design</topic><topic>Dynamic memory</topic><topic>Exact sciences and technology</topic><topic>General and reference</topic><topic>Hardware</topic><topic>Hierarchical storage management</topic><topic>Information storage systems</topic><topic>Information systems</topic><topic>Integrated circuits</topic><topic>Interconnection architectures</topic><topic>Measurement</topic><topic>Mutual exclusion</topic><topic>Operating systems</topic><topic>Parallel architectures</topic><topic>Process management</topic><topic>Process synchronization</topic><topic>Semiconductor memory</topic><topic>Software</topic><topic>Software and its engineering</topic><topic>Software organization and properties</topic><topic>Storage management</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Mellor-Crummey, John M.</creatorcontrib><creatorcontrib>Scott, Michael L.</creatorcontrib><collection>Pascal-Francis</collection><collection>CrossRef</collection><collection>Computer and Information Systems Abstracts</collection><collection>Technology Research Database</collection><collection>ProQuest Computer Science Collection</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>Computer and Information Systems Abstracts Academic</collection><collection>Computer and Information Systems Abstracts Professional</collection><jtitle>ACM transactions on computer systems</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Mellor-Crummey, John M.</au><au>Scott, Michael L.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Algorithms for scalable synchronization on shared-memory multiprocessors</atitle><jtitle>ACM transactions on computer systems</jtitle><stitle>ACM TOCS</stitle><date>1991-02-01</date><risdate>1991</risdate><volume>9</volume><issue>1</issue><spage>21</spage><epage>65</epage><pages>21-65</pages><issn>0734-2071</issn><eissn>1557-7333</eissn><coden>ACSYEC</coden><abstract>Busy-wait techniques are heavily used for mutual exclusion and barrier synchronization in shared-memory parallel programs. Unfortunately, typical implementations of busy-waiting tend to produce large amounts of memory and interconnect contention, introducing performance bottlenecks that become markedly more pronounced as applications scale. We argue that this problem is not fundamental, and that one can in fact construct busy-wait synchronization algorithms that induce no memory or interconnect contention. The key to these algorithms is for every processor to spin on separate locally-accessible flag variables, and for some other processor to terminate the spin with a single remote write operation at an appropriate time. Flag variables may be locally-accessible as a result of coherent caching, or by virtue of allocation in the local portion of physically distributed shared memory. We present a new scalable algorithm for spin locks that generates 0(1) remote references per lock acquisition, independent of the number of processors attempting to acquire the lock. Our algorithm provides reasonable latency in the absence of contention, requires only a constant amount of space per lock, and requires no hardware support other than a swap-with-memory instruction. We also present a new scalable barrier algorithm that generates 0(1) remote references per processor reaching the barrier, and observe that two previously-known barriers can likewise be cast in a form that spins only on locally-accessible flag variables. None of these barrier algorithms requires hardware support beyond the usual atomicity of memory reads and writes. We compare the performance of our scalable algorithms with other software approaches to busy-wait synchronization on both a Sequent Symmetry and a BBN Butterfly. Our principal conclusion is that contention due to synchronization need not be a problem in large-scale shared-memory multiprocessors. The existence of scalable algorithms greatly weakens the case for costly special-purpose hardware support for synchronization, and provides a case against so-called “dance hall” architectures, in which shared memory locations are equally far from all processors. —From the Authors' Abstract</abstract><cop>New York, NY, USA</cop><pub>ACM</pub><doi>10.1145/103727.103729</doi><tpages>45</tpages><oa>free_for_read</oa></addata></record> |
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subjects | Applied sciences Architectures Computer science control theory systems Computer systems and distributed systems. User interface Computer systems organization Contextual software domains Cross-computing tools and techniques Design Dynamic memory Exact sciences and technology General and reference Hardware Hierarchical storage management Information storage systems Information systems Integrated circuits Interconnection architectures Measurement Mutual exclusion Operating systems Parallel architectures Process management Process synchronization Semiconductor memory Software Software and its engineering Software organization and properties Storage management |
title | Algorithms for scalable synchronization on shared-memory multiprocessors |
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