A single-chip universal digital satellite receiver with 480-MHz IF input

This paper presents a complete single-chip universal digital satellite receiver supporting all current DBS system standards. The mixed-signal device accepts a modulated data stream at up to 90 Mbps and delivers a demodulated, error-corrected output data stream. The IC features an analog front end wi...

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Bibliographic Details
Published in:IEEE journal of solid-state circuits 1999-11, Vol.34 (11), p.1634-1646
Main Authors: Kwentus, A.Y., Pai, P., Jaffe, S., Gomez, R., Tsai, S., Kwan, T., Hing-Tsun Hung, Shin, Y.J., Hue, V., Cheung, D., Khan, R.A., Ward, C.M., Mong-Kai Ku, Choi, K., Searle, J., Bult, K., Cameron, K., Demas, J., Reames, C., Samueli, H.
Format: Article
Language:English
Subjects:
Analog integrated circuits
Analog-digital conversion
Binary phase shift keying
Chips
Devices
Digital
Digital filters
Digital integrated circuits
Frequency conversion
Intermediate frequencies
Matched filters
Quadrature phase shift keying
Receivers
Satellite broadcasting
Satellites
Streams
Tracking loops
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Summary:This paper presents a complete single-chip universal digital satellite receiver supporting all current DBS system standards. The mixed-signal device accepts a modulated data stream at up to 90 Mbps and delivers a demodulated, error-corrected output data stream. The IC features an analog front end with 480-MHz intermediate frequency downconversion and dual 8-bit analog-to-digital converters, an all-digital BPSK/QPSK/OQPSK variable-rate receiver supporting 1-45 MBaud operation with phase/frequency recovery, variable-rate digital filters, square-root Nyquist matched filters, acquisition and tracking loops, and a DVB/DSS/DigiCipher I/II-compliant concatenated Viterbi/Reed-Solomon forward error correction decoder with on-chip deinterleaver RAM. All required clocks are generated on chip from a single reference crystal. The chip contains 1.2 million transistors in a die area of 22 mm/sup 2/ and was implemented in a single-poly 0.35-/spl mu/m CMOS process with four layers of metal.
ISSN:0018-9200
1558-173X
DOI:10.1109/4.799874