Wide-band, low-noise, matched-impedance amplifiers in submicrometer MOS technology

Circuit design techniques for realizing wideband, low-noise, matched-impedance amplifiers in submicrometer MOS technology are discussed. A circuit configuration with two feedback loops has been fabricated in an experimental 1-/spl mu/m NMOS technology. The fabricated amplifier has an insertion gain...

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Bibliographic Details
Published in:IEEE journal of solid-state circuits 1987-12, Vol.22 (6), p.1031-1040
Main Authors: Toh, K.-Y., Meyer, R.G., Soo, D.C., Chin, G.M., Voshchenkov, A.M.
Format: Article
Language:English
Subjects:
Bandwidth
Broadband amplifiers
Circuit synthesis
Feedback circuits
Feedback loop
Gain
Low-noise amplifiers
MOS devices
Noise figure
Voltage
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Summary:Circuit design techniques for realizing wideband, low-noise, matched-impedance amplifiers in submicrometer MOS technology are discussed. A circuit configuration with two feedback loops has been fabricated in an experimental 1-/spl mu/m NMOS technology. The fabricated amplifier has an insertion gain of 16.35 dB, a -3-dB bandwidth of 758 MHz, a maximum input voltage standing-wave ratio (VSWR) of 2.45, a maximum output VSWR of 1.60, and an average noise figure of 6.7 dB (with reference to a 50-/spl mu/m source resistance) from 10 to 758 MHz.
ISSN:0018-9200
1558-173X
DOI:10.1109/JSSC.1987.1052852