Magnetoresistive hybrid transistor in vertical architecture

We report the development of a hybrid semiconductor–metal–semiconductor permeable‐base transistor in vertical architecture, which operates by positive charge carrier transport. This transistor has a p‐type silicon collector, a thin tin layer as base and a conjugated polymer, poly(9,9‐dioctyl‐2,7‐ fl...

Full description

Saved in:
Bibliographic Details
Published in:Physica status solidi. A, Applications and materials science Applications and materials science, 2005-11, Vol.202 (14), p.R158-R160
Main Authors: Meruvia, M. S., Benvenho, A. R. V., Hümmelgen, I. A., Gomez, J. A., Graeff, C. F. O., Li, R. W. C., Aguiar, L. H. J. M. C., Gruber, J.
Format: Article
Language:English
Subjects:
75.47.Pq
81.07.Pr
85.30.De
85.70.Kh
Applied sciences
Electronics
Exact sciences and technology
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Transistors
Citations: Items that this one cites
Items that cite this one
Online Access:Get full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:We report the development of a hybrid semiconductor–metal–semiconductor permeable‐base transistor in vertical architecture, which operates by positive charge carrier transport. This transistor has a p‐type silicon collector, a thin tin layer as base and a conjugated polymer, poly(9,9‐dioctyl‐2,7‐ fluorenylenevinylene), as emitter material. The transistor transport characteristics are dependent on the applied magnetic field and the base transport factor for positive charge carriers is nearly ideal. (© 2005 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)
ISSN:1862-6300
0031-8965
1862-6319
1521-396X
DOI:10.1002/pssa.200521270